September 25, 2025
Article by IO+ Innovation Origins- Bart Brouwers
When chips hit their performance ceiling, it’s usually not physics in the abstract; it’s temperature. Self-heating throttles output power, shifts operating points, and shortens lifetimes. The problem is especially acute in III-V semiconductors (such as GaAs, InP, and GaN): they enable blistering speeds and photons-on-demand, but their substrates are mediocre heat conductors.
Indium phosphide’s and gallium arsenide’s thermal conductivity is orders of magnitude lower than copper, so heat struggles to escape, degrading performance in photonics, RF, and high-power electronics. Eindhoven-based CoolSem Technologies, newly out of stealth at High Tech Campus, proposes a deceptively simple fix: remove the thermal bottleneck itself. The startup’s thin-film flow removes the III-V substrate and bonds the now ultra-thin device directly onto a heat-spreading layer or heatsink, creating a short, efficient path from the junction to the copper. The substrate can be reused, and the process is pitched as cost-effective and compatible with established supply chains.
CoolSem calls its platform WaLTIS, which stands for Wafer-Level Thermal Interface Stack. In a recent SEMI write-up, the company claims that WaLTIS can deliver up to 15 times better thermal management and 25–55 °C lower chip temperatures, boosting performance and reliability while reducing cooling energy by 30–50%. If those gains hold across device classes, they open new headroom for designers who have been forced to de-rate to stay within safe junction temperatures.
Why this matters now
The heat problem is getting worse, not better. [...]
Read the full article on the IO+ website
