FAQ
In this section, you’ll find answers to some of the most frequently asked questions. We’ve gathered the key information in one place to help you quickly find what you need. If your question isn’t listed here, feel free to reach out.
No. CoolSem is developing a platform technology that can be adapted to multiple device categories where thermal and thermo-mechanical constraints limit performance, reliability or integration. The exact stack design and integration route depend on the application, device architecture and manufacturing flow.
Usually not. WaLTIS is designed to complement existing packaging and cooling approaches by improving the thermal path at device level. This can improve the effectiveness of the overall cooling set-up and may reduce the burden on package- or system-level cooling, depending on the application.
No. CoolSem does not build fans, cold plates or complete cooling systems. CoolSem develops a semiconductor-level thermal technology that can become a key part of the overall cooling architecture of a device or component. Our role is to improve heat removal at the source and make existing package- and system-level cooling approaches more effective.
CoolSem works close to the active device layer, where heat is generated and where the first thermal bottlenecks often arise. Instead of only adding cooling capacity at package or system level, CoolSem improves the device-level thermal path itself. This increases the effectiveness of the entire cooling set-up, gives designers more freedom and helps system integrators reduce thermal complexity and total cost of ownership.
As semiconductor and photonic devices become more powerful, heat and thermo-mechanical stress increasingly limit performance, reliability and integration. Thermal bottlenecks can raise device temperature, increase cooling requirements and reduce lifetime. CTE mismatch can become an additional reliability risk, especially for larger dies, brittle materials and devices exposed to repeated thermal cycling. CoolSem addresses these challenges by improving the thermal and mechanical architecture close to where heat is generated.
CoolSem develops wafer-level thermal solutions for semiconductor and photonic devices. Our WaLTIS technology replaces the original device substrate with a proprietary engineered substrate that improves heat removal while helping to manage coefficient of thermal expansion (CTE) mismatch between the device layer and the next level in the assembly. The result is a more effective and mechanically robust thermal path, supporting better performance, efficiency, reliability and lifetime.
Yes. Thermal and thermo-mechanical challenges occur in both electronic and photonic devices, although the technical requirements differ by application. CoolSem is developing WaLTIS as a platform with relevance across both domains.
The exact benefit depends on the application, but typical value areas include lower thermal resistance, lower device temperature, improved performance stability, higher reliability, extended lifetime, reduced thermal design constraints, higher power density and lower cooling burden at package or system level. In photonic applications, better temperature control can also support improved wavelength stability. In some cases, the value may be cooler devices; in others, it may be simpler or cheaper assemblies and cooling systems.
Heat affects more than temperature alone. It can influence efficiency, output power, wavelength stability, signal quality, reliability, lifetime and system design complexity. In photonics, temperature can affect wavelength behaviour and optical performance. In RF and power devices, it can influence losses, derating, output power and long-term robustness.
Heat must ultimately leave the device through the full stack, from active layer to package and system-level cooling. Package and system cooling remain essential, but they cannot fully compensate for a weak thermal path close to the heat source. By improving the device-level thermal path, CoolSem can make downstream cooling more effective and reduce thermal design constraints elsewhere in the system.
The original substrate is usually selected first for device manufacturing, not for final thermal performance. In many devices, it represents a significant part of the thermal resistance between the active region and the heatsink. That can limit how effectively heat leaves the device. In addition, the substrate and package materials may expand differently during temperature changes, creating CTE mismatch and mechanical stress.
The original substrate is necessary to grow, process and support the device during manufacturing. Once the active device has been created, however, that same substrate is not always the best choice for the final thermal and mechanical architecture. It can add thermal resistance, contribute to CTE-related stress or limit the integration route. CoolSem removes the original substrate so it can be replaced by WaLTIS that is better suited to the final application.
Depending on the application, WaLTIS can combine a shorter thermal path, higher thermal conductivity, improved CTE matching, electrical isolation and mechanical support. These benefits are relevant because a thermal solution must not only remove heat effectively, but also remain mechanically reliable during processing, assembly and operation.
WaLTIS is CoolSem's Wafer-Level Thermal Interface Stack. It is an engineered wafer-level substrate consisting of multiple functional layers. WaLTIS is bonded to a thinned customer wafer and is designed to provide four main functions: improved thermal conduction from the device layer to the next level in the assembly; better CTE matching to support mechanical stability under thermal cycling; electrical isolation where required, including for high-voltage and RF applications; and mechanical support for the resulting bonded wafer stack, which is especially relevant for brittle materials such as InP. CoolSem's first generation is aimed at wafer sizes up to 200 mm, with larger wafer formats to be addressed in the second generation and through licensing models.
CoolSem typically fits between front-end device fabrication and back-end packaging as a wafer-level thermal integration step. We work upstream in the value chain, but the benefits are often realized further downstream by module makers, system integrators and end users through better performance, reliability or cooling efficiency.
CoolSem focuses on applications where heat removal, CTE mismatch and mechanical robustness are real bottlenecks and where a device-level thermal solution can create clear value. Current priority areas include RF, photonics/optoelectronics and selected power semiconductor applications.