Advancing chip fundamentals through material and thermal innovation.
CoolSem’s patented wafer-level thermal management technology helps chips run cooler, last longer, and perform beyond today’s limits.
CoolSem’s patented wafer-level thermal management technology helps chips run cooler, last longer, and perform beyond today’s limits.
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Learn more about our mission
We redefine semiconductor performance through material and thermal innovation.
Watch how our team works on this mission
why heat limits chips
While traditional cooling techniques remove heat from the package or system level, the real challenge lies deeper.
In the thermal resistance of the chip’s substrate.
Active device
Substrate
heatsink
But the challenge goes deeper than heat itself.
As devices cycle through temperature changes, the different materials inside each chip expand and contract at different rates — adding mechanical stress on top of thermal resistance. Over time, this stress degrades interfaces and compounds the very heat problem it’s meant to control.
Our wafer based solution
Our wafer based solution
CoolSem removes the substrate, the barrier to efficient heat flow.
And we replace it with our patented wafer-level carrier that conducts heat up to 15× better.
Active Devices
Substrate
Waltis ®
15× better thermal pathway, zero layout constraints
Our patented WaLTIS® wafer-level technology reduces thermal resistance by up to 15× and eliminates hotspots that degrade device performance and reliability. At the same time, the architecture remains dielectrically neutral — fully compatible with existing device layouts and electrical isolation schemes.
Key application domains
RF Base Stations
The advanced thermal substrate inside tomorrow’s 5G/6G antenna systems — conducting heat like metal, expanding like the die, and ensuring long-term reliability in every outdoor macro and mMIMO array.
SatCom
WaLTIS inside the GaAs power amplifier tiles of next-generation flat-panel user terminals. Replacing the native GaAs substrate, WaLTIS provides a high-conductivity, CTE-matched thermal bridge from the active epi to the baseplate — lowering junction temperatures and boosting PA lifetime.
Photonics
By engineering heat flow at wafer level, WaLTIS™ turns wavelength stability into a given, not a gamble.
Power Conversion
From server racks to electric vehicles, WaLTIS™ unlocks cooler, more compact, and more reliable wide-bandgap power conversion. Built for high-density PSUs, SiC inverters, and automotive OBCs looking to push performance boundaries.
Why WaLTIS® is different
Engineered substrate for hotspot relief
WaLTIS directly targets the die-to-substrate bottleneck, lowering junction temperature and smoothing mechanical stress where GaN, GaAs, InP and SiC devices run hottest.
Front-end neutral, Back-end friendly integration
WaLTIS integrates after device fabrication, preserving existing SiC/GaN wafer lines while fitting seamlessly into today’s die-attach, DBC, and module assembly flows.
Flexible Across Platforms and Process Flows
WaLTIS integrates with varied device types and manufacturing routes, enabling high-performance substrates without altering upstream designs or downstream assembly.
What does CoolSem do?
CoolSem develops wafer-level thermal solutions for semiconductor and photonic devices. Our WaLTIS technology replaces the original device substrate with a proprietary engineered substrate that improves heat removal while helping to manage coefficient of thermal expansion (CTE) mismatch between the device layer and the next level in the assembly. The result is a more effective and mechanically robust thermal path, supporting better performance, efficiency, reliability and lifetime.
What problem is CoolSem solving?
As semiconductor and photonic devices become more powerful, heat and thermo-mechanical stress increasingly limit performance, reliability and integration. Thermal bottlenecks can raise device temperature, increase cooling requirements and reduce lifetime. CTE mismatch can become an additional reliability risk, especially for larger dies, brittle materials and devices exposed to repeated thermal cycling. CoolSem addresses these challenges by improving the thermal and mechanical architecture close to where heat is generated.
What is unique about CoolSem's approach?
CoolSem works close to the active device layer, where heat is generated and where the first thermal bottlenecks often arise. Instead of only adding cooling capacity at package or system level, CoolSem improves the device-level thermal path itself. This increases the effectiveness of the entire cooling set-up, gives designers more freedom and helps system integrators reduce thermal complexity and total cost of ownership.
What is WaLTIS?
WaLTIS is CoolSem's Wafer-Level Thermal Interface Stack. It is an engineered wafer-level substrate consisting of multiple functional layers. WaLTIS is bonded to a thinned customer wafer and is designed to provide four main functions: improved thermal conduction from the device layer to the next level in the assembly; better CTE matching to support mechanical stability under thermal cycling; electrical isolation where required, including for high-voltage and RF applications; and mechanical support for the resulting bonded wafer stack, which is especially relevant for brittle materials such as InP. CoolSem's first generation is aimed at wafer sizes up to 200 mm, with larger wafer formats to be addressed in the second generation and through licensing models.
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